Physical Design Engineer - Multiple Levels
Location
Austin, TX
Level
Mid-Level
Department
Semiconductors
Type
Salary
$140,000 - $230,000
Job Description
Posted on:
2025-12-28
Responsibilities
- Innovate and develop physical design solutions using state-of-the-art tools and technologies.
- Manage the complete Physical Design Flow for SOC and core designs.
- Conduct place and route, floorplanning, power planning, and IR drop analysis.
- Perform multi-mode & multi-corner clock tree synthesis, routing, and timing optimization.
- Debug timing violations and implement timing fixes and functional ECOs.
- Conduct formal verification and physical verification of designs.
- Utilize scripting and software languages such as Python, PERL/TCL, and C for design tasks.
Job Requirements
- Bachelor's, Master's, or PhD in Science, Engineering, or related field.
- 2-10+ years of industry experience in Physical Design.
- Experience with Place & Route tools (Cadence Innovus and/or Synopsys Fusion Compiler).
- Timing closure experience in Synopsys PTSI.
- Knowledge of power domain and physical verification.
- Strong scripting skills in Python, PERL/TCL, and Linux/Unix shell.
- Understanding of ASIC design, verification, validation, and integration.
