Qualcomm

Physical Design Engineer - Multiple Levels

Job Description

Posted on: 
2026-03-01

Responsibilities

  • Innovate and implement physical design flows for SOC and core designs.
  • Develop low power implementation methods and customized place & route solutions.
  • Conduct floorplanning, power planning, and IR drop analysis.
  • Perform timing optimization and closure, including debugging timing violations.
  • Implement formal verification and physical verification processes.
  • Utilize scripting and software languages such as Python, PERL/TCL, and Linux/Unix shell.
  • Deliver complex Physical Design solutions from netlist to final product.

Job Requirements

  • Bachelor's, Master's, or PhD in Science, Engineering, or related field.
  • 2-10+ years of industry experience in Physical Design.
  • Experience with Place & Route tools like Cadence Innovus or Synopsys Fusion Compiler.
  • Familiarity with timing closure in Synopsys PTSI.
  • Knowledge of formal verification and power domain analysis.
  • Proficiency in physical verification techniques.
  • Strong scripting skills in relevant programming languages.
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