RTL & Codesign Engineer
Location
San Francisco, CA
Level
Staff / Principal
Department
Consumer Electronics
Type
Salary
$225,000 - $445,000
Job Description
Posted on:
2026-03-29
Responsibilities
- Produce clean, production-quality microarchitecture and RTL for major accelerator subsystems.
- Contribute to architectural studies including performance modeling and feasibility analysis.
- Collaborate with software, simulator, and compiler teams for hardware/software co-design.
- Partner with DV and PD to ensure functional correctness and integration.
- Build and review performance and functional models to validate design intent.
- Participate in design reviews and documentation across the silicon lifecycle.
- Provide support during the bring-up of silicon.
Job Requirements
- Graduate-level experience in computer architecture or AI/ML hardware–software co-design.
- Expertise in writing production-quality RTL in Verilog/SystemVerilog.
- Experience developing hardware design models or architectural simulators.
- Familiarity with industry-standard design tools and methodologies.
- Ability to work cross-functionally with various engineering teams.
- Strong problem-solving skills across abstraction layers.
- Passion for building large-scale hardware systems.
