Package Design Engineer
Location
Santa Clara, CA
Level
Mid-Level
Department
Semiconductors
Type
Salary
$116,000 - $190,000
Job Description
Posted on:
2026-03-18
Responsibilities
- Define the chip pad ring and substrate interconnect scheme.
- Lead the package layout design process for package test vehicles.
- Implement electrical, mechanical, and thermal structures in test vehicles.
- Develop design flow for new package technologies.
- Collaborate with cross-functional teams for package design requirements.
- Work with off-shore fab and package assembly manufacturing partners.
- Evaluate package technology through effective design implementations.
Job Requirements
- BS in Electrical Engineering or Mechanical Engineering (or equivalent experience).
- 3+ years of package design experience.
- Strong programming skills (Perl, Python, Tcl desired).
- Working knowledge of Cadence Allegro Packaging Design (APD).
- Experience in 2.5D packages.
- Strong problem-solving skills.
- Passion for technology and innovation.
