Silicon Reliability Engineer
Location
Mountain View, CA
Level
Senior-Level
Department
Consumer Electronics
Type
Salary
$159,000 - $231,000
Job Description
Posted on:
2026-03-24
Responsibilities
- Define custom silicon ASIC reliability specifications based on JEDEC standards and Google product field usage conditions.
- Execute ASIC product reliability qualification tests, including HTOL, ESD, LU, ELFR, TC, and BHAST testing.
- Utilize statistical methods and failure analysis to estimate SOC lifetimes and evaluate CMOS technology reliability.
- Collaborate with cross-functional teams, including CMOS foundries, OSATs, and third-party qualification facilities.
- Supervise test execution and failure analysis for ICs to meet quality standards.
- Work closely with product management and design engineering teams to define standards and specify tests.
- Provide technical recommendations based on analysis and testing results to ensure product reliability.
Job Requirements
- Bachelor's degree in Electrical Engineering, Material Science, Mechanical Engineering, Physics, or a related technical field.
- 6 years of experience in logic ASIC device and package reliability qualification.
- Experience with semiconductor device physics and testing methodologies.
- Preferred: Master's degree or PhD in a relevant field.
- 10 years of experience in reliability testing and qualification of ICs to JEDEC standards (preferred).
- Proficiency in statistical analysis tools and techniques.
- Strong interpersonal and communication skills for collaboration and technical recommendations.
