Apple

SoC Physical Design Engineer, PnR

Job Description

Posted on: 
2026-01-16

Responsibilities

  • Collaborate with the logic design team to understand partition architecture and influence physical aspects early in the design cycle.
  • Complete netlist to GDS2 implementation for design partitions.
  • Conduct timing, physical, and electrical verification, ensuring signoff closure for the partitions.
  • Identify and resolve design and flow issues related to physical design.
  • Drive execution of potential solutions to design challenges.
  • Utilize knowledge of chip architecture and back-end design flow.
  • Engage in physical design verification processes (DRC/LVS, EMIR).

Job Requirements

  • Minimum BS Degree with 0+ years of experience.
  • Basic understanding of logic gates.
  • Previous internship or project work in computer architecture, VLSI, or circuit design.
  • Strong teamwork and collaboration skills across various functional teams.
  • Familiarity with Verilog, VHDL, Python, Perl, TCL, and/or SPICE.
  • Ability to drive physical design efforts and meet deadlines.
  • Understanding of physical synthesis, floor-planning, and place and route (PnR).
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