Texas Instruments

Packaging Engineering Intern - MS/PhD - Santa Clara

Job Description

Posted on: 
2025-10-10

Responsibilities

  • Interface across various work areas and organizations for semiconductor packaging technologies.
  • Participate in cross-functional teams to develop solutions for packaging technologies.
  • Work on advancements in material, mechanical, thermal, and electrical characterization.
  • Assist in the development of Wirebond, Flip Chip, Modules, SIPs, and other advanced packages.
  • Collaborate effectively with team members from different functions.
  • Demonstrate analytical and problem-solving skills.
  • Manage time effectively to ensure on-time project delivery.

Job Requirements

  • Currently pursuing a Master's degree in Mechanical Engineering, Materials Science, Chemical Engineering, Physics, or Electrical Engineering.
  • Cumulative GPA of 3.0/4.0 or higher.
  • Knowledge of semiconductor packaging processes and reliability is preferred.
  • Strong written and verbal communication skills.
  • Ability to work in teams and collaborate effectively.
  • Strong time management skills.
  • Initiative and drive for results in a fast-paced environment.
Apply now

More job openings