Systems Engineering Intern - Silicon PDK
Location
Santa Clara, CA
Level
Internship
Department
Semiconductors
Type
Salary
$64,000 - $119,000
Job Description
Posted on:
2026-02-03
Responsibilities
- Assist in developing schematic-driven layout flows for photonic integrated circuits (PIC).
- Translate schematic-level designs into layout and create Parametric Cells using SKILL scripting.
- Support design enablement and PDK development, maintaining PDK and automation.
- Contribute to design rules and verification methodologies, including DRC and LVS checks.
- Support optical-electrical co-design linking photonic and RF blocks for simulation.
- Collaborate with teams to validate flows through integrated simulation and testbench development.
Job Requirements
- Currently pursuing a PhD in Electrical Engineering, Applied Physics, Photonics, or related field.
- Strong experience with Cadence Virtuoso or similar photonic design tools.
- Fundamental understanding of photonics integrated circuits and design experience using tools like Lumerical and HFSS.
- Preferred experience in contributing to successful tape-outs at foundries.
- Familiarity with Electronic-Photonic Design Automation (EPDA) flows.
- Experience using Python-based layout frameworks for photonic layout automation.
- Experience in creating or modifying Parametric Cells with SKILL scripting.
