Neurophos

VP of VLSI

Job Description

Posted on: 
2026-01-28

Responsibilities

  • Provide strategic vision and leadership for the VLSI organization and ASIC roadmap.
  • Build and mentor engineering teams for digital, analog/mixed-signal, and FPGA design.
  • Implement quality-driven design methodologies and project-development processes.
  • Oversee all stages of ASIC development from architecture to high-volume manufacturing.
  • Drive design of complex mixed-signal SoCs with high-speed data interfaces.
  • Manage design execution and relationships with foundries for successful tape-outs.
  • Collaborate with various teams to deliver integrated optical compute modules.

Job Requirements

  • PhD or MS in Electrical Engineering, Computer Engineering, or related field.
  • Minimum 15 years of industry experience in VLSI/ASIC design and productization.
  • Proven track record of high-volume production of mixed-signal SoCs.
  • Hands-on experience with high-speed silicon photonic devices.
  • Expertise in high-speed mixed-signal design and signal integrity.
  • Experience with CMOS foundries and managing tape-outs.
  • Strong background in DFM, DFT, and production test for advanced chips.
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