Power Integrity Engineer
Location
San Francisco, CA
Level
Senior-Level
Department
Consumer Electronics
Type
Salary
$171,000 - $302,000
Job Description
Posted on:
2026-01-27
Responsibilities
- Define the PDN architecture and design solutions for various power specifications.
- Model, simulate, and characterize power delivery for die, interposer, package, board, and Voltage Regulators.
- Collaborate with multi-functional teams to design power delivery systems for current and future generations.
- Manage all SoC droop-related topics, including droop budgets and noise coupling analysis.
- Conduct end-to-end simulation studies to meet impedance and voltage droop specifications.
- Provide implementation guidelines and feedback to cross-functional teams.
- Perform feasibility studies for silicon floorplan and advanced droop mitigation schemes.
Job Requirements
- M.S. or Ph.D. in Power/Signal Integrity, Power Electronics, or Analog Circuit Design.
- Understanding of power supply architecture and PCB/package design trends.
- Experience in PI/SI methodology development and PDN modeling.
- Proficiency in Python coding and AI/ML assisted automation.
- Experience in design and analysis of product power supply solutions.
- Knowledge of Voltage Regulator design principles and electrical performance.
- Familiarity with lab equipment like VNA, real-time scopes, and spectrum analyzers.
